Register map – Lucent Technologies MN10285K User Manual
Page 315
Register Map
Panasonic Semiconductor Development Company
MN102H75K/F75K/85K/F85K LSI User Manual
314
Panasonic
Table A-3 Register Map: x’00FE00’ to x’00FFFF’
20
MSBs
4 LSBs
Description
F
E
D
C
B
A
9
8
7
6
5
4
3
2
1
0
00FE00
TM3
BC
TM2
BC
TM1
BC
TM0
BC
8-bit timer registers
00FE10
TM3
BR
TM2
BR
TM1
BR
TM0
BR
00FE20
TM3
MD
TM2
MD
TM1
MD
TM0
MD
00FE30
TM8TST
(test register)
00FE40
00FE50
00FE60
00FE70
00FE80
TM4TST
(test register)
(TM4CBX
)
TM4CB
(TM4CAX
)
TM4CA
TM4BC
TM4MD
16-bit timer 4 registers
00FE90
TM5TST
(test register)
(TM5CBX
)
TM5CB
(TM5CAX
)
TM5CA
TM5BC
TM5MD
16-bit timer 5 registers
00FEA0
00FEB0
00FEC0
00FED0
00FEE0
00FEF0
00FF00
AN3BUF
AN2BUF
AN1BUF
AN0BUF
ANTST
(test register)
ANCTR
ADC registers
00FF10 AN11BUF AN10BUF AN9BUF
AN8BUF
AN7BUF
AN6BUF
AN5BUF
AN4BUF
00FF20
00FF30
00FF40
00FF50
00FF60
00FF70
FBEWER
FAR-
EGEX
FAREG
FDREG
FCREG
Flash memory write control
registers
00FF80
MEMMD1
EXWMD
External memory wait control
registers
00FF90
PCNT2
PCNT0
I/O port control registers
00FFA0
PCNT1
(test register)
00FFB0
P8
PUP
P7
PUP
P6
PUP
P5
PUP
P4
PUP
P3
PUP
P2
PUP
P1
PUP
P0
PUP
00FFC0
P8
OUT
P7
OUT
P6
OUT
P5
OUT
P4
OUT
P3
OUT
P2
OUT
P1
OUT
P0
OUT
00FFD0
P8
IN
P7
IN
P6
IN
P5
IN
P4
IN
P3
IN
P2
IN
P1
IN
P0
IN
00FFE0
P8
DIR
P7
DIR
P6
DIR
P5
DIR
P4
DIR
P3
DIR
P2
DIR
P1
DIR
P0
DIR
00FFF0
P6
MD
P5
MD
P4
MD
P3
MD
P2MD
P1MD
P0
MD