Interrupts, Disable 1: enable, No interrupt requested 1: interrupt requested – Lucent Technologies MN10285K User Manual
Page 53: Interrupt undetected 1: interrupt detected, Sets the priority from 0 to 6, Iq3ie: external interrupt 3 interrupt enable flag, Iq4ir: external interrupt 4 interrupt request flag, Iq4id: external interrupt 4 interrupt detect flag, Iq4ie: external interrupt 4 interrupt enable flag
Interrupts
Interrupt Control Registers
Panasonic Semiconductor Development Company
MN102H75K/F75K/85K/F85K LSI User Manual
52
Panasonic
IQ3ICH: External Interrupt 3 Interrupt Control Register (High)
x’00FC53’
IQ3ICH enables external interrupt 3. It is an 8-bit access register. Use the
MOVB instruction to access it.
The priority level for external interrupt 3 is written to the IQ2LV[2:0] field
of the IQ2ICH register.
IQ3IE: External interrupt 3 interrupt enable flag
0: Disable
1: Enable
IQ4ICL: External Interrupt 4 Interrupt Control Register (Low)
x’00FC58’
IQ4ICL requests and verifies interrupt requests for external interrupt 4. It
is an 8-bit access register. Use the MOVB instruction to access it.
IQ4IR: External interrupt 4 interrupt request flag
0: No interrupt requested
1: Interrupt requested
IQ4ID: External interrupt 4 interrupt detect flag
0: Interrupt undetected
1: Interrupt detected
IQ4ICH: External Interrupt 4 Interrupt Control Register (High)
x’00FC59’
IQ4ICH sets the priority level for and enables external interrupt 4. It is an
8-bit access register. Use the MOVB instruction to access it.
IQ4LV[2:0]: External interrupt 4 interrupt priority level
Sets the priority from 0 to 6.
IQ4IE: External interrupt 4 interrupt enable flag
0: Disable
1: Enable
Bit:
7
6
5
4
3
2
1
0
—
—
—
—
—
—
—
IQ3IE
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R
R
R
R
R/W
Bit:
7
6
5
4
3
2
1
0
—
—
—
IQ4IR
—
—
—
IQ4ID
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R
R
R/W
R
R
R
R
Bit:
7
6
5
4
3
2
1
0
—
IQ4LV2 IQ4LV1 IQ4LV0
—
—
—
IQ4IE
Reset:
0
0
0
0
0
0
0
0
R/W:
R
R/W
R/W
R/W
R
R
R
R/W