4 closed-caption decoder registers – Lucent Technologies MN10285K User Manual

Page 237

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Closed-Caption Decoder

Closed-Caption Decoder Registers

Panasonic Semiconductor Development Company

MN102H75K/F75K/85K/F85K LSI User Manual

236

Panasonic

9.4

Closed-Caption Decoder Registers

All registers in Closed-caption Decoder block cannot be written by byte (by word

only). Read by byte is possible.

Table 9-9 Closed-Caption Decoder Register

Register

CCD0

Address

CCD1

Address

R/W

Description

FCCNT

x’007E00’

x’007E20’

R/W

VBI decoding format select register

MAXMIN

x’007E02’

x’007E22’

R

CRI interval maximum and minimum register

SLICE

x’007E04’

x’007E24’

R/W

VBI data slice level register

HNUM

x’007E06’

x’007E26’

R

HSYNC count register

ACQ1

x’007E08’

x’007E28’

R/W

ACQ capture timing control register 1

CAPDATA

x’007E0A’

x’007E2A’

R

Caption data capture register

CRIFA

x’007E0C’

x’007E2C’

R

CRI frequency width register A

CRIFB

x’007E0E’

x’007E2E’

R

CRI frequency width register B

CRI1S

x’007E10’

x’007E30’

R/W

CRI capture start timing control register 1

CRI1E

x’007E12’

x’007E32’

R/W

CRI capture stop timing control register 1

CRI2S

x’007E14’

x’007E34’

R/W

CRI capture start timing control register 2

CRI2E

x’007E16’

x’007E36’

R/W

CRI capture stop timing control register 2

DATAS

x’007E18’

x’007E38’

R/W

Data capture start timing control register

DATAE

x’007E1A’

x’007E3A’

R/W

Data capture stop timing control register

STAP

x’007E1C’

x’007E3C’

R/W

Sampling start position register (software setting)

FCPNUM

x’007E1E’

x’007E3E’

R

Sampling start position register (hardware calculation)

NFSEL

x’007EC0’

x’007EE0’

R/W

Noise filter select register

FQSEL

x’007EC2’

x’007EE2’

R/W

Frequency select register

SCMING

x’007EC4’

x’007EE4’

R/W

Minimum sync level detection interval set register

BPPST

x’007EC6’

x’007EE6’

R/W

Backporch position register

SYNCMIN

x’007EC8’

x’007EE8’

R

Sync and pedestal level register

SPLV

x’007ECA’

x’007EEA’

R/W

Sync separator level set register

CLAMP

x’007ECC’

x’007EEC’

R/W

Clamping control register

HSEP1

x’007ECE’

x’007EEE’

R/W

HSYNC separator control register 1

HSEP2

x’007ED0’

x’007EF0’

R/W

HSYNC separator control register 2

FIELD

x’007ED2’

x’007EF2’

R/W

Field detection control register

HLOCKLV

x’007ED4’

x’007EF4’

R/W

Sync separator detection control register 1

HDISTW

x’007ED6’

x’007EF6’

R/W

Sync separator detection control register 2

VCNT

x’007ED8’

x’007EF8’

R/W

VSYNC separator control register

HVCOND

x’007EDA’

x’007EFA’

R

Sync separator status register

CLPCND1

x’007EDC’

x’007EFC’

R

Clamping control signal status register 1

SBFNUM

x’007F4C’

x’007F6C’

R

Sampling start position register

TESTA

x’007F4E’

x’007F6E’

R

Test register

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