Intel PXA26X User Manual

Page 3

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Intel® PXA26x Processor Family Developer’s Manual

iii

Contents

Contents

1

Introduction ...................................................................................................................................1-1

1.1

Intel® XScale™ Core Features .........................................................................................1-1

1.2

System Integration Features..............................................................................................1-2
1.2.1

Memory Controller ................................................................................................1-2

1.2.2

Clocks and Power Controllers...............................................................................1-2

1.2.3

Universal Serial Bus (USB) Client.........................................................................1-3

1.2.4

Direct Memory Access Controller (DMAC) ...........................................................1-3

1.2.5

Liquid Crystal Display (LCD) Controller ................................................................1-3

1.2.6

AC97 Controller ....................................................................................................1-3

1.2.7

Inter-Integrated Circuit Sound (I2S) Controller .....................................................1-3

1.2.8

Multimedia Card (MMC) Controller .......................................................................1-4

1.2.9

Fast Infrared (FIR) Communication Port...............................................................1-4

1.2.10 Synchronous Serial Protocol Controller (SSPC)...................................................1-4
1.2.11 Inter-Integrated Circuit (I2C) Bus Interface Unit....................................................1-4
1.2.12 General Purpose Input/Output (GPIO) .................................................................1-4
1.2.13 Universal Asynchronous Receiver/Transmitters (UARTs) ....................................1-4
1.2.14 Real-Time Clock (RTC).........................................................................................1-5
1.2.15 Operating System (OS) Timers.............................................................................1-5
1.2.16 Pulse-Width Modulator (PWM) .............................................................................1-5
1.2.17 Interrupt Controller ................................................................................................1-5
1.2.18 Integrated Synchronous Flash ..............................................................................1-5
1.2.19 Single-ended Universal Serial Bus Client interface ..............................................1-5
1.2.20 Network Synchronous Serial Protocol Port...........................................................1-6
1.2.21 Audio Synchronous Serial Protocol Port...............................................................1-6
1.2.22 Hardware UART (HWUART) ................................................................................1-6

2

System Architecture .....................................................................................................................2-1

2.1

Overview ............................................................................................................................2-1

2.2

Package Types ..................................................................................................................2-2

2.3

Intel® XScale™ Microarchitecture Implementation Options..............................................2-3
2.3.1

CPU Core Fault Register — PSFS Bit ..................................................................2-3

2.3.2

Coprocessor 14 Registers 0-3 – Performance Monitoring....................................2-3

2.3.3

Coprocessor 14 Register 6 and 7– Clock and Power Management .....................2-4

2.3.4

Coprocessor 15 Register 0 – ID Register Definition .............................................2-4

2.3.5

Coprocessor 15 Register 1 – P-Bit .......................................................................2-5

2.4

Input/Output Ordering ........................................................................................................2-5

2.5

Semaphores ......................................................................................................................2-6

2.6

Interrupts............................................................................................................................2-6

2.7

Reset .................................................................................................................................2-7

2.8

Internal Registers...............................................................................................................2-7

2.9

Selecting Peripherals vs. General Purpose Input/Output ..................................................2-8

2.10

Power on Reset and Boot Operation .................................................................................2-8

2.11

Power Management...........................................................................................................2-8

2.12

Pin List ...............................................................................................................................2-9

2.13

Register Address Summary.............................................................................................2-21

2.14

Memory Map ....................................................................................................................2-33

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