Altera Transceiver PHY IP Core - Manual (Page 171)

Parameter Value Description
Metaframe length in
words
5-8191 Specifies the number of words in a metaframe. The
default value is 2048.
Although 5 -8191 words are valid metaframe length
values, the current Interlaken PHY IP Core
implementation requires a minimum of 128
Metaframe length for good, stable performance.
In simulation, Altera recommends that you use a
smaller metaframe length to reduce simulation
times.
Input clock frequency
Lane rate/<n>
Lane rate/80
Lane rate/64
Lane rate/50
Lane rate/40
Lane rate/32
Lane rate/25
Lane rate/20
Lane rate/16
Lane rate/12.5
Lane rate/10
Lane rate/8
Specifies the frequency of the input reference clock.
The default value for the Input clock frequency is
the Lane rate /20. Many reference clock frequencies
are available.
PLL type
CMU
ATX Specifies the PLL type.
The CMU PLL has a larger frequency range than the
ATX PLL. The ATX PLL is designed to improve
jitter performance and achieves lower channel-to-
channel skew; however, it supports a narrower range
of lane data rates and reference clock frequencies.
Another advantage of the ATX PLL is that it does
not use a transceiver channel, while the CMU PLL
does. Because the CMU PLL is more versatile, it is
specified as the default setting.
7-4 Interlaken PHY General Parameters
UG-01080
2015.01.19
Altera Corporation Interlaken PHY IP Core
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